# Maintainer: Felix Yan <felixonmars@archlinux.org>
# Contributor: Marcin (CTRL) Wieczorek <marcin@marcin.co>
# Contributor: Jeffrey Tolar <tolar.jeffrey at gmail dot com>

pkgname=verilator
pkgver=4.018
pkgrel=1
pkgdesc='The fastest free Verilog HDL simulator'
url='https://www.veripool.org/projects/verilator/wiki/Intro'
arch=('x86_64')
license=('LGPL')
depends=('gcc-libs')
makedepends=('gcc')
source=("http://www.veripool.org/ftp/verilator-$pkgver.tgz")
sha512sums=('62b74659dc3dc1c7eb0cca08cf6a514d4416ca24cff15f8ca315d5d106c2a978c077050602525cb17bb6d522e1f84b2711cd67d11d282dc29f65cb416ae98e46')

build() {
  cd verilator-$pkgver

  ./configure --prefix=/usr
  make
}

package() {
  cd verilator-$pkgver

  make install DESTDIR="$pkgdir"
}
